StarNovax Microprocessor Chip Info

[gerrimat]

Gang at Cheers, here's some data on the StarNovax Micro used
in quite a few machines...

Manufacturer: STAR Electronics
Second Source: NEC Electronics
Date of Manufacture 1990 to 2000
This is an OBSOLETE DEVICE...

Manufacture Last Time Build: 2002

Large number of these chips produced several Thousand and its
very inexpensive in the surplus market.

Data Sheets: Due to Chip Obsolesence Data Sheets are Nearly
impossible to come by. One web site selling Chinese Commondity
chips claims to have a data sheet but when querried shows nothing
available.

Data that is available: Z80 Microprocessor Core Based Instruction Set.

Contains 2764 of One Time Programmable EPROM.

Not Erasable or Reprogrammable. Electrically programmed through
its data and address lines upon initialization.

Normally programmed through a device programmer like a Needham's
or any other number of common programmers. BUT, due to the limitation
on getting the data sheets developing an interface socket to program a
chip is nearly impossible.

Is it possible to 'read out the contents of the onboard prom'? YES

Can you overwrite it or change the code in a pre-programmed chip...
Form all information available: From all Indicators answer is: NO.
Unless there is an EEPROM Form of the chip available which does not
appear to be the case.

Can you transfer program contents with modifications to a BLANK CPU?
Answer is: YES with properly configured programmer.

Chip Packaging: Normally sold as a 64 pin DIP Pack. But also available
in a QFP Quad Flat Pack and a SMD cliped pin DIP pack.

Normal application in the Pachislo Machines is the 64 pin dip.

Since this chip is OBSOLETE, any use by the manufactures will rely on
existing chip stock or purchases of 'grey' market parts.

It would suggest that new machines built after 2004 will begin to
incorporate a new MicroController variant and get away from the
StarNovax Part.

Any new variant part will more than likely incorporate EEPROM or
Flash Ram in its structure to permit the machine manufactures to more
easily change/ revise/ or modify a chip through a normal production
life of a machine chassis style.

Also with more complex graphics, music and play options the day of
the simple 8 bit Z80 has probably ended. Look for new parts in the
32 bit varations in new machines with complex LCD displays.

Since everyone here has a newer machine of some type examine the
main cpu board and look for the large multi-pin ic on the board and
write down the part numbers on the chips.

Newer machines may be easier to reprogram than the older ones.

I have spent several days using my best contacts to get this much info.

Hope it helps or if anyone has more data if you can add it to this or if
I have made any errors here please add your corrections.

Will continue looking for the elusive data sheet.

[pachislousa]

I've already exhausted my sources... Are you sure it is discontinued? I think there is a newer, and older version of the starnovax chip... I also see net references to letech as the company name.. (starnovax chip part numbers are le2080-pa; older one might have been a 10xx part number, but I'm going by memory here.....)

Below is the info on the group that has the pinout.. Unfortunately, they're selling it. Shouldn't be hard to duplicate this effort.. A lot of the lines on the z80 cpu portion of the starnovax should be easy to spot (especially the data lines - toggle an input;watch what goes high...)



http://slotfactory.hp.infoseek.co.jp/

Babelfish translation follows:

You probably will know the fact that CPU, LE 2080 has been recorded in the main baseplate of the slot? Alias LETECH this has controlled most parts of the slot in the heart of the slot machine. To about 10 years ago this CPU and ROM (the part which writes the program) another ones it was main current from now. Presently CPU and ROM becoming one chip, it has been recorded before the main baseplate. Because of this with the usual ROM lighter/writer it could not look at the program in the slot. But reading of the program was actualized by the fact that LE 2080 is placed in the special conversion baseplate. You can grasp the sub control ROM which has been recorded before the sub baseplate with usual method. As for the data which you grasp we send with the HEX file format. If you show to the one where CPU which calls this Z80 is recognized contents of the program are recognized.

Program reading cost
Concerning the slot 1 type 70000 Yen LE the case of 2080 and sub ROM being packed reading only the main baseplate sub baseplate of the desired type it is necessary for you to send to this. After the grasping we return. The postage becomes customer burden. * With this we do not receive program analysis. Please note. The PROM lighter/writer which the LETECH reading baseplate (the substance, the connector cable, taking theory is attached and) can read 2764 separately in selling price 300000 Yen reading is necessary. In addition there are also times when by any chance you cannot read in affinity of the PROM lighter/writer. Please acknowledge. At that time the recommendation machine you introduce (the PROM lighter/writer) with this oneThis time you analyze from the content of LETECH and the large hitting, this type of discovery presently has been installed the type which has periodicity in the child actor, but we have not arrived to the market as information of capture. 000 000000 is. Picture reference This time this detailed data (the periodic table of 1 address unit and period of 1 scene and main program of this slot and the excerpt schematic and the entire diagram of the baseplate) doing to attach, we sell. Please use in one for research. 300000 Yen in selling price In the question the amateur regarding the purchase or contents there are some which do not reply. In addition we cannot answer to the inquiry of type name altogether. Only the one which you can understand with the above-mentioned contents purchase please inquire.

[delphicoder]

Hi Gerrimat.

It looks like we are both doing kinda the same thing. I have also looked high and low for the starnovax chip spec sheet. Not a thing could I find. I am half tempted just to pull mine out of my test machine and dump it down to see what is in it. BUT, I can't really do that without the spec sheet to connect the pins correctly.

Oh well, just thought I would chime in and agree that particular chip information is rare. You came up with some good information there!

[gerrimat]

Gents and Ladies of Course,
Have confirmed the chips obsolesense. The LeTech is the Chinese
manufacturing branch of Star Electronics out of Japan. I have also
encountered the site claiming to be able to progam these chips.
Unfortunately its in China as well.
I will be decoding the chip pinout from the reverse engineering effort
on either my NET machine or some other that uses it. This should
give us a leg up on which lines are which. Afterall I do this for a living.
My machine will be here on Wed (Tommorrow afternoon) As soon
as I get my hands on it and confirm proper operation I'm going to
analyse it. So hold off pulling any chips off of boards until I can tell
you which pins are power/ground and I/O.

The site I found that had the data sheet listed but not there was a
site called DOOM Electronics Surplus, or something similar to this.

I have check the UK sites and found squat. But maybe using a full
version Coopernic Search Engine it might find more info in the
Oriental Sites. I can figure out the data sheet if I can just get a copy of
it.

[gerrimat]

Here's an update on my quest for info.

Sanyo is the Third manufacture to fab this chip. They also
discontinued the production in 2002.

I also registered with www.doom.com ic data web site to see
if I can dig the data sheets out of their historical obsolete parts
data base. I'm waiting for my authorization to access the database.

This is a fee paid data base so if you decide to use it be aware it
will cost you after an initial trial period.

[gerrimat]

More StarNovax Information:

I pulled this information from a couple of Chinese Web Sites and it was
like pulling teeth out through your posterior orifice with out Novacain.

LETECH LE2080A-PA Is the chip being mainly used in the Pachislo
Machines, it increases sales the MPU of the NEC Corporation
manufacturer.

The C-MOS of the ASIC, is the Z-80 core with memory in one chip.

Since this chip is described as an ASIC this would indicate that it is a
custom manufactured part and that the LETECH Company is a packaging
house that took silicon parts like the die for the Z80 from NEC and
someone else’s OTP Prom and bonded them into a single package. This
would make sense in the earlier days of IC production before unitized
CPU’s with flash prom were available off the shelf.

I could find no references to any type of inboard AtoD converter functions
so any Data acquisition being performed must be simple I/O functions.
Just like the sound functions are being produced by an external
synthesizer chip with the program being stored inside the CPU ASIC.

Device Design is as follows:

Z80 Microprocessor Core Manufactured by NEC

ROM - 8kx8 Bytes OTP (2764)

RAM - 512 bytes Internal Memory

PIO - 2 ports (8bit+4bit) 1 port is defined as 8 bits and the 2nd as 4 bits

16 Bits address and Data Buses Non-Multiplexed (Meaning they have
their own lines in the out of the chip)

WDT – Programmable WatchDog Timer (Used to Restart the Chip in
the event of a software crash)

CTC (8bit×4) – Counter/ Timer/ Clock

Built-in address decoder for normal 64K address space.

The internally stored program can be read out with a standard EPROM
writer/programmer.

There is some additional data about electrical noise floor levels related to
the Olympia and Pioneer Machines related to how ‘quiet’ the design of
these Pachislo Computers are as compared to implementations from
other manufacturers.

This would indicate the StarNovax CPU used in some of the machines
can be subject to externally induce electrical interference of some type.

This would explain the hissing or static sound that is produce by certain
machines through the speakers.

Noise filtration may be possible to add to the audio output circuits to
improve this condition.


Still can’t find the danged data sheet… Argh!

[electronrancher]

Anyone interested in continuing this endeavor? I worked on it over the weekend, and have about 60% of the pinout complete. I have some very good guesses as to how to read out the ROM, but not too sure how you'd write to a blank one. (Actually only one pin is built to take a programming voltage, but it also seems to be the RAM supply so I'm not going to drive it to +12 anytime soon!)

If anyone has an old board with a sacrificial LETECH, it would greatly assist the effort. Other than that, I'm looking for information on both the old (external ROM) and new (internal ROM) devices. Although it may seem unlikely, a great deal of information can be extracted simply by examining the pachislo mainboard. PM me if you're interested in working on this.

[Zeron Stargate]

The best place I have found to get outdated spec sheets
is hitting the news groups. some don't give it up so easy
unless you speak the same language.. just my 2 cents

[electronrancher]

hmm unfortunately i'm english as a first language. well let me try my luck - can you point me in the right direction as far as newsgroups go?

[Zeron Stargate]

hmm unfortunately i'm english as a first language. well let me try my luck - can you point me in the right direction as far as newsgroups go?

Will post a list here for ya.
let me do some asking around in the groups I belong to.

[prayerny1]

I think I found what you have been looking for µµ½ºÄÚ¸®¾Æ they have the program,and can help.

[prayerny1]

Can Someone please pickup the staff and run with the ball. Any programmers out their? I would love to see a custom chip come out or at lease in ENGLISH. Thanks

[johnmalvaso]

Heck yes - i'm still interested - is this thread still going?

john

[zylos]

I'm just gonna dump this here. I'm hoping to do a more in-depth write-up along with PCBs for allowing dumping via TL866ii Plus devices and other utilities.

This is the pinout for the V2 and V4 devices, scrapped off the https://cafe.naver.com/gamepcb website, which is one of the few sites still alive from the author "cpu8080/doskorea/Yeong Chan, Park".
I also have some level of schematics and information about the internals, die photos, and other tidbits.
He produced a clone chip based on the Z80 CPU, PIO, CTC, with RAM/ROM + FPGA Glue Logic

The die-photo is from Antoine Bercovici / SiliconInsider via https://siliconpr0n.org/archive/doku...80a-t6w05bdopt
He de-capped and photoed the die just last year. I hope to do a higher-res silicon stitched die photo at some point, but it may not be needed to re-create the full CPU in an emulator with the level of information we already have.

Just this information alone should allow full dumping of the V2 CPU along with re-programming an spare chips.
The V4 CPU apparently has some protections against dumping from the Addr/Data lines, but cpu8080 was able to bypass it using an In-Circuit Emulator device for the Z80.

1737812798-3660-v2_cpu8080.jpg1737812803-3661-v4_cpu8080.jpg
1737818637-6141-v4-block_diagram_blank_446.jpg
1737801586-1446-3-v2_pcb1-446_cpu8080.jpg1737801718-1541-v2_pcb_cafe2_cpu8080.jpg
1643acd7.jpg

1737802462-1623-3_v2_v4_read_tool_446b_cpu8080_cpu8080.jpg
d408366054.3.jpglow-res-die-image.jpg

[zylos]

I also have some photos of his early prototypes for LE2080/LE2280

It shows the CPU is really just a Z80 CPU, PIO, CTC, RAM, ROM + a tiny bit of glue logic.
Attachment 110017Attachment 110018

The ROM in this case I believe would slot on top of the chip labeled RAM in the provided socket.
The other unlabeled chips are PLDs and GALs, likely just for a very small amount of glue logic.

Schematics from the 2008 version supporting the LE2080, LE2280, and LE4280 (Slightly older/newer revisions than the layout in last post, some resistors have moved around)
Attachment 110020Attachment 110021Attachment 110022Attachment 110023Attachment 110024

I also have some snippets of potentially the FPGA logic. It looks like the glue logic might only be for routing and managing the clock signals, but this might not be all of it.
Attachment 110019

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: WWW.DOSKOREA.COM
// Engineer: PARK YEONG CHAN
//
// Create Date: 21:07:37 07/29/2008
// Design Name: JAPANESE CUSTOME IC
// Module Name: V2-LE2280A.LE2280B-PA
// Project Name: CLOCKING
// Target Devices: PACHINKO,PACHISLOT MACHINE
// Tool versions: XILINX TOOL.VerilogHDL Design
// Description: Inculde Z80-CPU,Z80-CTC,Z80-PIO
// Dependencies: Internal circuit Design
// Revision: A
// Revision 0.01 - File Created
// Additional Comments:
//////////////////////////////////////////////////////////////////////////////////
module mc4040(iclko,iclko2,osc1,osc2,ieo,count_rst,ieosclko,clksel1 ,clksel2,clksel3,ieosel);
input osc1,ieo,count_rst;
output iclko;
output iclko2;
output osc2;
output ieosclko;


reg sclko;
wire [2:0]sel;
wire [7:0]q;
input clksel1,clksel2,clksel3,ieosel;


assign osc2 = ~osc1;
assign iclko = q[0];//U21
assign iclko2 = q[0];//U18E.U18F

assign ieosclko = (ieosel) ? sclko : ieo;//U25C
assign sel={clksel3, clksel2, clksel1};

//U21(MC14040)
t_ff tff0(q[0], osc2, count_rst);
t_ff tff1(q[1], q[0], count_rst);
t_ff tff2(q[2], q[1], count_rst);
t_ff tff3(q[3], q[2], count_rst);
t_ff tff4(q[4], q[3], count_rst);
t_ff tff5(q[5], q[4], count_rst);
t_ff tff6(q[6], q[5], count_rst);
t_ff tff7(q[7], q[6], count_rst);

always @(sel or q)begin
if(sel==3'b000)sclko<=q[0];
else if(sel==3'b001)sclko<=q[1];
else if(sel==3'b010)sclko<=q[2];
else if(sel==3'b011)sclko<=q[3];
else if(sel==3'b100)sclko<=q[4];
else if(sel==3'b101)sclko<=q[5];
else if(sel==3'b110)sclko<=q[6];
else if(sel==3'b111)sclko<=q[7];
end

endmodule
//////////////////////////////////////////////////////////////////////////////////
module t_ff(q,clk,count_rst);

input clk,count_rst;
output q;

edge_dff dff0(q,d,clk,count_rst);
not n1(d,q);

endmodule
//////////////////////////////////////////////////////////////////////////////////
module edge_dff(q,d,clk,count_rst);

input d,clk,count_rst;
output q;
reg q;
always @(negedge clk or negedge count_rst)
if(!count_rst) q <=1'b0;
else q <=d;

endmodule
//////////////////////////////////////////////////////////////////////////////////

[출처] XILINX- XC95288XL-10-TQ144 (PACHINKO-JAPAN) | 작성자 박영찬

It's not out of the realm of possibility to do a full re-creation of the LE2080 processor from the ground up.

[zylos]

Some unfortunately blurry schematics, which might be useful still knowing the pin names used from the above reference pinout

c0ed932d.jpg1737810007-2623-v2-le2080a-pa_e2280b-pa_www.gamepcb.com_cpu8080.jpg1737810007-2624-v4-le4280b_idnac_www.doskorea.com_cpu8080.jpg

[MrGneiss]

It looks like your photos from post #15 didn't work (it happens sometimes).. Could you try posting them again.. If you label them I can put them in the other post where they should be!!

[zylos]

These are the two board shots of his early prototypes, showing the actual needed components to build a replica LE2080
1737807726-2272-v2.v4-lowcost-b446bk_cpu8080.jpg1737807726-2273-v2.v4-lowcost-a446bk_cpu8080.jpg

These are the PCB Gerber shots which exist of various prototype states for his V2/V4 emulation boards.
1737804126-1946-v2-le2080a-le2280b-da_v4-le4280b-da1_cpu8080.jpg1737804126-1947-v2-le2080a-le2280b-da_v4-le4280b-da2_cpu8080.jpg1737804126-1948-v2-le2080a-le2280b-da_v4-le4280b-da3_cpu8080.jpg1737810816-2687-v2-20091023_cpu8080.jpg1737810816-2688-v4-20091023_cpu8080.jpg

I've been quiet on this for a while, but I'll circle back around to this project sometime this year.
I've got some work on a prototype for a board that will adapt the LE2080 to be read / flashed by a TL866 II Plus.

I have some ideas on how to attempt a partial de-cap of a LE2080 chip and attempt to turn it into a re-programmable one. Both the LE2080A-PA and LE2080A-DA are the same chip. The DA variant just has a glass window.
If I can etch/de-cap it without disturbing the bond wires, you can just backfill with a very low viscosity resin to make DIY windowed flashable LE2080.
I managed to grab like 16 extra LE2080 chips from a japanese source that I forget, so I have some to experiment around with.
No idea if I'll go through with that project, but like, it's a possibility